Dt Sheet. The MJE is designed for high—voltage, high—speed power switching inductive circuits where fall time is critical. Preferred devices are Motorola recommended choices for future use and best overall value. There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC — VCE limits of the transistor that must be observed for reliable operation; i.
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Dt Sheet. The MJE is designed for high—voltage, high—speed power switching inductive circuits where fall time is critical. Preferred devices are Motorola recommended choices for future use and best overall value. There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown.
Safe operating area curves indicate IC — VCE limits of the transistor that must be observed for reliable operation; i. Second breakdown limitations do not derate the same as thermal limitations. Allowable current at the voltages shown on Figure 1 may be found at any case temperature by using the appropriate curve on Figure 3.
T J pk may be calculated from the data in Figure 4. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. Use of reverse biased safe operating area data Figure 2 is discussed in the applications information section.
Forward Bias Power Derating 1 0. DC Current Gain 0. Collector Saturation Region 0. Base—Emitter Saturation Voltage Figure 8. Capacitance 3— MJE Table 1. In this section, these specifications will be discussed and related to the circuit examples illustrated in Table 2. Circuits B and C in Table 2 illustrate applications that require high blocking voltage capability. The blocking capability at this point depends on the base to emitter conditions and the device junction temperature.
Since the highest device capability occurs when the base to emitter junction is reverse biased V CEV , this is the recommended and specified use condition. Increasing the reverse bias will give some improvement in device blocking capability. The sustaining or active region voltage requirements in switching applications occur during turn—on and turn—off.
If the load contains a significant capacitive component, high current and voltage can exist simultaneously during turn—on and the pulsed forward bias SOA curves Figure 1 are the proper design limits.
For inductive loads, high voltage and current must be sustained simultaneously during turn—off, in most cases, with the base to emitter junction reverse biased.
Under these conditions the collector voltage must be held to a safe level at or below a specific value of collector current. This can be accomplished by several means such as active clamping, RC snubbing, load line shaping, etc.
The safe level for these devices is specified as a Reverse Bias Safe Operating Area Figure 2 which represents voltage—current conditions that can be sustained during reverse biased turn—off.
This rating is verified under clamped conditions so that the device is never subjected to an avalanche mode. In circuits A and D, inductive reactance is clamped by the diodes shown. In circuits B and C the voltage is clamped by the output rectifiers, however, the voltage induced in the primary leakage inductance is not clamped by these diodes and could be large enough to destroy the device.
A snubber network or an additional clamp may be required to keep the turn—off load line within the Reverse Bias SOA curve. Load lines that fall within the pulsed forward biased SOA curve during turn—on and within the reverse bias SOA curve during turn—off are considered safe, with the following assumptions: 1 The device thermal limitations are not exceeded.
On this data sheet, these parameters have been specified at 8 amperes which represents typical design conditions for these devices. The current drive requirements are usually dictated by the V CE sat specification because the maximum saturation voltage is specified at a forced gain condition which must be duplicated or exceeded in the application to control the saturation voltage.
For this reason considerable effort is usually devoted to reducing the fall time. The recommended way to accomplish this is to reverse bias the base—emitter junction during turn—off.
The reverse biased switching characteristics for inductive loads are discussed in Figure 11 and Table 3 and resistive loads in Figures 13 and The inductive switching characteristics are derived from the same circuit used to specify the reverse biased SOA curves, See Table 1 providing correlation between test procedures and actual use conditions.
Therefore, separate measurements must be made on each waveform to determine the total switching time. For this reason, the following new terms have been defined. However, at lower test currents this relationship may not be valid.
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